10/29/2026

speaker
Mike Bishop
Investor Relations

Hello, everyone, and welcome to Adam Mayer's Third Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded and a replay will be available on Adam Mears' IR website for one year. I'm Mike Bishop with the company's investor relations. As in prior quarters, we are using Zoom and we will follow a similar presentation format with participants in a listen-only mode. We will open with prepared remarks from Scott Bibaud, Adam Mears' president and CEO, and Frank Laurencio, Adam Mears' CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the events and presentation section of our investor relations page on our website. Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the risk factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24, 2026. except as otherwise required by federal securities laws, Adamera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions, and circumstances. Also, please note that during this call, we will be discussing non-GAAP and intermeasures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website. And with that, I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

speaker
Scott Bibaud
President and CEO

Thanks, Mike. And good afternoon, everyone. When I look back on Q3, what stands out is how many long-running efforts came to a head in the last 90 days. We hit a gate-all-around target we publicly committed to in February. We extended MST into a part of the memory market we'd never served before, and we turned our GaN on silicon breakthrough into a manufacturing relationship with a world-class wafer supplier. Let me take those in order. Gate all around first, then memory, then our power and RF pipeline, and I'll close on GaN. Gate-all-around is quite simply the hardest manufacturing problem the industry is facing today. Building transistors with features thousands of times thinner than a human hair while holding individual doping atoms exactly where they belong through the downstream thermal budget is precisely the kind of problem MST was created to solve. Only four companies in the world are developing gate-all-around and back in February I set a clear objective for the year to be actively engaged with the leaders driving this transition. Today I can tell you we've met that objective. We're now engaged with three of the four GATE all-around customers and we remain in active dialogue with the fourth. If our efforts with these players pan out, MST will become a standard ingredient in all future leading-edge logic nodes. While each of these engagements are in a different phase from the early evaluation stage to running development demonstrations on customer silicon, together they position MST as a solution to one of the biggest challenges confronting teams developing gate all around nodes and the CFET generation that follows it. Advanced node customers move deliberately, asking for proof point after proof point before they take any new material into production. So every stage we clear carries weight. Memory is where I see the curve bending upward fastest. The pressure on memory makers to wring more capacity and performance out of every wafer has rarely been greater. And importantly, they have both the urgency and the resources to qualify new approaches. In Q3, we broadened our reach to memory manufacturers spanning both halves of the market, Next Generation DRAM and NAND flash. Let me linger on DRAM for a moment because it shows how MST creates value for two different next gen DRAM requirements. First, AI has driven demand for high bandwidth memory, which uses leading edge logic as the base wafer. We are leveraging our gate all around know how and using it to help achieve similar gains in these base wafers. Second, for decades, the industry made DRAM cells smaller with finer lithography, but that lever is nearly exhausted. The next move for some memory makers is a denser cell, the industry calls 4F squared, which tips the access transistor up on its end, a virtual channel, and places the storage capacitor above it, shrinking cell area by about a third with no change in lithography. The challenge is building a good vertical transistor, and that's Atomair's opening. We are leveraging our phosphorus blocking know-how from Gate All Around to precisely control the dopants, preventing movement into places where they shouldn't be. MSD-based vertical transistors can hit the drive current and leakage targets 4F² requires while stripping out costly process steps. In other words, a cheaper and more manufacturer road to the next DRAM generation. We laid this out in a peer-reviewed paper at CISPAD in September, the industry's premier conference for process and device simulation. And the response to our paper proved that we were tackling a big problem the industry is grappling with. More importantly, recent visits with the leading memory manufacturers confirmed their interest in just such a solution. NAND is the newer story. As I mentioned last quarter, AI is driving demand for higher density SSDs, which means the number of layers in a 3D NAND device has to keep climbing. But as layer count increases, so does the logic required to drive it. And the CMOS base die is projected to grow faster than the memory array die sitting above it. Because the CMOS wafer is bonded to the array, a size mismatch between the two can become an expensive problem. MSD helps solve it by enabling shorter gate lengths so the two die can be sized to match, making for far more cost-effective solutions. These engagements are still early, but they're encouraging, both in terms of the customer problem we're addressing and the real silicon data behind our approach. And as you can imagine, the market size is enormous. Across the rest of the pipeline, momentum is steady. Our large ongoing program with a major analog and power manufacturer is tracking to plan. The two engineering teams are in lockstep, executing wafer runs with the objective of including MST in the next node of customer devices. Elsewhere in power and RFSOI, we're moving several new customers forward, putting MST to work on devices like trench vets and HBTs. whose efficiency and high frequency behavior matter more by the day as AI data centers reshape how power is delivered. And internally, our high throughput RFSOI process effort, where locking down the right substrate supply chain is pivotal, keeps advancing and should translate to other applications as well. That brings me to GaN on silicon, which was a standout this quarter. Start with the size of the prize. As RF moves to their next generation, designers increasingly reach for GaN because of its raw power and bandwidth, right up to fully integrated front ends that fold in the power amplifier. The RF GaN market sits near $1.2 billion today and is compounding at double digits towards roughly $2 billion within a few years. Moreover, this breakthrough is likely to expand the TAM by opening new applications which integrate with silicon devices at 200 and 300 millimeter wafer sizes. As a reminder, our breakthrough earlier this year brought MST-enabled GaN on silicon within striking distance of advanced RF SOI on the two numbers designers live by, loss and linearity. bought on a low-cost silicon wafer rather than a costly specialty substrate that this type of performance has typically demanded. If design activity starts shifting towards GaN on silicon, we'd be standing at the front of a large and fast-expanding market. This quarter, we announced something new, a route to manufacturing in the form of a joint development agreement with IQE announced last week. IQE is among the world's foremost manufacturers of compound semiconductor epitaxy, the precision crystal growth step beneath every GAN wafer. Under the JDA, IQE's GAN epitaxy grown on MST silicon substrates will be optimized to identify the best low-cost, high-performance RF GAN on silicon wafers possible. This work, which has already begun, will allow us to improve performance at the same time we are solving the manufacturing side of the equation, meaning we short-circuit the qualification cycle normally required before production. A JDA like this is what moves us from a lab result to a product. IQE gives us a credible, high-volume production path and a way to put real sample wafers into the hands of foundry, IDM, and fabulous designers. We're starting with RF, but the agreement covers GAN for power as well, broadening the opportunity further. In short, IQE is a catalyst to get MST GAN on silicon to market faster, and we believe they can become an important producer of MST-enabled wafers. Atomera offers MST in two forms. One is a blanket deposition that customers can buy and use as a starting wafer, and the other is deposited inside a customer's transistor. Over the last few years, we've emphasized starting wafer offerings because they're easier for customers to trial and integrate and therefore represent a faster path to revenue for Atomera. A year ago, we had two applications for those starting wafers, and now we're up to six, including RFSOI, GaN on silicon, memory applications, and more. Therefore, today we are introducing the Prima brand for those products. Our more traditional offering, where MST is integrated selectively into the middle of a semiconductor device, will now be known as Selecta. Applications such as Gate All-Around, Power Devices, and HBT use the Selecta process. We're introducing these brand names to highlight the growing importance of starting wafer solutions within Atomera's product portfolio. You'll find much more on Prima Selecta and how MST enhances transistors on our newly refreshed website, which should go live tomorrow. It tells the MST story far more clearly across logic, memory, RF, and power, and I'd encourage you to spend a few minutes exploring our offerings there. Putting it together, we delivered on the February gate all around goal by reaching three of the four customers in that market. We widened the memory opportunity to span both DRAM and NAND and rolled out MST for 4F squared. We kept the power and RF programs on course, and we turned our GAN breakthrough into a future production partnership with IQE. There's indeed a great deal to be excited about at Atomera right now. With that, I'll turn the call over to Frank to review our financials.

speaker
Frank Laurencio
CFO

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the third quarter of 2026. This slide shows our summary financials. We recognize no revenue in this third quarter compared with $11,000 in the third quarter of 2025 and $158,000 in the second quarter of this year. As we've noted before, our revenue in recent quarters has consisted of fees tied to wafer deliveries and MSTCAD licenses. Wafer deliveries are lumpy from quarter to quarter and no wafer shipments for revenue fell in Q3. Our gap net loss for the third quarter of 2026 was $6 million or 15 cents per share compared with a net loss of $5.6 million or 17 cents per share in the third quarter of 2025. on a non-GAAP basis, our net loss was $4.6 million compared with 4.4 million in the third quarter of last year. GAAP operating expenses were $6.3 million in the third quarter, an increase of approximately $652,000 from 5.7 million in the third quarter of 2025 and down about $563,000 from 6.9 million in the second quarter. Stock-based compensation, which is excluded from our non-GAAP results, was $1.7 million compared with $1.3 million a year ago. On a non-GAAP basis, operating expenses were $4.6 million, up about $249,000 year over year, and down $572,000 from the second quarter of 2026. Year over year, non-GAAP R&D increased by $242,000 driven primarily by higher tool access costs. G&A decreased by 60,000 and sales and marketing increased by $67,000. The sequential decline from the second quarter primarily reflects non-recurring items in the first half of this year when we were accruing deferred 2025 bonuses. Looking at GNA on a year-over-year basis, you can see those expenses in Q3 of this year increased only modestly over Q3 of 2025, reflecting normal annual bonus accrual and increased IP legal costs. Our balance of cash, cash equivalents, and short-term investments on September 30, 2026 was $34.8 million, compared with $38.4 million on June 30th. We used $3.2 million of cash in operating activities in the quarter compared with 3.9 million in the second quarter and 3.4 million in the third quarter of last year. We did not sell any shares under our ATM during the last quarter, our second consecutive quarter with no ATM sales. As of September 30th, 2026, we had 39.1 million shares outstanding. I need to make a note about fourth quarter cash usage. Operating cash use will step up this quarter, primarily because of a roughly $1.4 million one-time payment made on October 1st that prepays the lease for our 200 millimeter tool for all of 2027. I want to flag that now because it shouldn't be read as a change in our underlying run rate. As I mentioned earlier, revenue from wafer shipments is lumpy and we don't have long-term visibility. We expect to recognize revenue for wafer deliveries this quarter of approximately $50,000. On our last two calls, we said we expected 2026 non-gap operating expense to be approximately $18.5 million for the year, plus or minus 250,000. And on the second quarter call, I pointed to the high end of that range. that is still our expectation due to the upward cost trend for tool leases, metrology and device fabrication. We flagged this trend last quarter and it reflects very tight supply in the industry. Our negotiations on some tool lease terms are still ongoing. So it is too early to give guidance on 2027 expenses but we will continue to work on keeping our fixed costs as low as possible. With that, I'll turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott.

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