Everspin Technologies, Inc.

Good afternoon and welcome to Everspend Technologies' fourth quarter 2025 financial results conference call. At this time, all participants are in a listen-only mode. After the conclusion of management's prepared remarks, instructions will be provided for the question and answer session. As a reminder, this conference call is being recorded. I would now like to turn the conference over to Monica Gould, investor relations for Everspend. You may begin.

Thank you, Operator, and good afternoon, everyone. Everspin released results for the fourth quarter and full year 2025 ended December 31, 2025, this afternoon after market close. I'm Monica Gould, Investor Relations for Everspin, and with me on today's call are Sanjeev Agarwal, President and Chief Executive Officer, and Bill Cooper, Chief Financial Officer. Before we begin the call, I would like to remind you that today's discussion may contain forward-looking statements regarding future events, including, but not limited to, the company's expectations for Everspin's future business, financial performance, and goals, customer and industry adoption of MRAM technology, successfully bringing to market and manufacturing products in Everspin's design pipeline, and executing on its business plan. These forward-looking statements are based on estimates, judgments, current trends, and market conditions and involve risks and uncertainties that may cause actual results to differ materially from those contained in the forward-looking statements. We would encourage you to review the company's SEC filings, including the annual report on Form 10-K and other SEC filings made from time to time in which the company may discuss risk factors associated with investing in Everspin. All forward-looking statements are made as of the date of this call, and except as required by law, the company undertakes no obligation to update or alter any forward-looking statement made on this call, whether as a result of new information, future events, or otherwise. The financial results discussed today reflect the company's preliminary estimates, are based on information available as of the date hereof, and are subject to further review by Everspin and its external auditors. The company's actual results may differ materially from these estimates as a result of the completion of financial closing procedures, final adjustments, and other developments arising between now and the time that the financial results for this period are finalized. Additionally, the company's press release and statements made during this conference call will include discussions of certain measures and financial information in GAAP and non-GAAP terms. Included in the company's press release are definitions and reconciliations of GAAP net income to non-GAAP net income, which provide additional details. A copy of the press release is posted on the Investor Relations section of Everspin's website at www.everspin.com. And now, I'd like to turn the call over to Everspin's President and CEO, Sanjeev Agarwal. Sanjeev, please go ahead.

Thank you, Monica, and thanks, everyone, for joining us on the call today. We are pleased to report fourth quarter results with revenue of $14.8 million and non-GAAP EPS of $0.11 per diluted share with revenue towards the high end of our guidance range and EPS in line with our expectations. Our performance this quarter was driven by strength in data center, energy management, and industrial automation applications. Growth in data center was driven by our ongoing work with IBM on the FCM4 module as well as its recently introduced FCM5 and the redundant array of independent disks or RAID reference design at the top five hyperscale operators. Within energy management and industrial automation, we saw demand return to normal levels after a period of inventory consumption that dampened demand in the prior year. With respect to below the line items, we recognize $2 million in other income in the fourth quarter and $10.5 million to date from the $14.6 million contract we have with a DOD contractor to develop a sustainment plan for our MRAM manufacturing facilities to provide continuous onshore MRAM capabilities to their aerospace and defense customers. We expect this business to progress on schedule with estimated completion in the first half of 2027. On the product side, we had a total of 238 design wins in 2025, up from 178 in the prior year. Our pipeline of new design wins for our RamRam products speaks to the continuing technical innovation from the Everspin team introducing new products to meet customer demand. These design wins support new customers and existing customers with new programs in industrial automation, casino gaming, energy management, and military and aerospace applications. Turning to some of our product development efforts. We continue to expand our XPI STTM RAM portfolio in response to demand from our customers. We are pleased to announce that during the fourth quarter, we ramped our Persyst 64 megabit XPI STTM RAM high reliability product to full production and saw strong demand driven by new customer interest and design wins, specifically in the low earth orbital or LEO satellite market. These devices are AEC Q100 grade one qualified, and ideally suited for use in harsh conditions such as 125 C Celsius operating temperature with a minimum 10 years of data retention. These capabilities are demanded by our customers to secure critical data in a variety of systems from aerospace and defense to industrial applications including automotive. We are taking orders to support high volume production from our customers and began shipping in the current quarter. In addition, we are in the process of qualifying high density, high reliability parts of 128 megabit and 256 megabit that will be available in high volume in the second half of this year. We are on track to tape out a monolithic 256 megabit XPI STDM RAM device on a 16 nanometer FinFET node at TSMC in the second half of this year. This part will be our first product in the Unisys family, unifying code storage and data memory in a high density, non-volatile architecture for edge AI, industrial, and mission critical designs. It is designed to deliver high bandwidth read and write speeds in a non-volatile memory device, enabling fast boot, rapid updates, and predictable performance without the trade-offs of traditional flash-based designs. By combining high-speed access with persistent storage, this family of parts will support software design systems that require frequent reconfiguration while maintaining data integrity across power cycles. As part of our efforts to build onto our partner network, we recently qualified our persist 64 megabit XPI STTM RAM for microchips PIC64-HPSC series of 64-bit microprocessors, or MPUs, and are supporting the ecosystem for components being qualified by microchip. This ecosystem includes several industry partners that jointly offer solutions tailored for the harsh environmental conditions in space. The high-density, high-reliability X-Py STD MRAM parts I discussed earlier would be an ideal solution for this application. MRAM is achieving significant success as a leading embedded non-volatile memory in IoT, automotive, and AI edge devices. Yet, the densities and performance options of embedded MRAM macros have been limited. At the same time, the semiconductor industry is moving towards chiplets to overcome rising costs, manufacturing complexity, and yield limitations of traditional large monolithic chips. especially when combining leading-edge logic with volatile or non-volatile memory. Chiplets enable mix and match process nodes, greater customization, and reuse of building blocks, providing new freedom of degrees in the form of heterogeneous packaging solutions. With organizations such as the Open Compute Project embracing chiplets from the hyperscale data center to the edge, it is foreseeable that chiplets will be ubiquitous. This trend increasingly favors Everspin given our focus on marketing chip solutions, including chiplets, and licensing our technology to embedded MRAM partners. In 2025, we further advance our efforts in this area through several initiatives. We engage with the Fraunhofer Chiplet Center of Excellence to analyze next-generation automotive compute platforms and corresponding MRAM use cases. We subsequently progress to engage on system level simulations into which we plan to provide MRAM simulation models to allow an assessment as well as quantification of the benefits that MRAM can provide in various use cases. Everspin is also participating in an effort to bring MRAM chiplets to the IMEC ecosystem that is aligned with the framework of the Open Compute Project chiplet work streams. IMEC launched the Automotive Chiplet Forum in 2024 to bring together members from the automotive industry to enable an open chiplet ecosystem essential for accelerating innovation, reducing costs, and reinforcing the supply chain. More recently, we joined the newly formed Physical AI Chiplet Ecosystem, or PACE, to help enable MRAM-based solutions for physical AI. As part of this effort to co-develop interoperable and reusable chiplets to reduce development costs and speed time to market for system and ASIC companies, Everspin will provide a robust, high-performance, non-volatile memory to assist securing PACE chiplets for boot, wait and code storage, as well as lifecycle management solutions. We expect to see chiplets addressing various applications over the next few years. As a reminder, the chiplet is part of our Unisys unified code and data memory solutions, which are currently in the design phase. To further enhance the position in the auto industry, we are working with Quinteros, a joint venture of leading semiconductor companies on a next generation RISC-V based automotive reference design platform. RISC-V is an open standard instruction set architecture, or ISA, based on reduced instruction set computer, or RISC, principles allowing anyone to design, manufacture, and sell chips without paying a license fee for the ISA. Its modular architecture allows designers to create purpose-built accelerators using RISC-V core technology as well as extensions. This also includes new instructions that uniquely integrate and leverage MRAM as a persistent working memory. Given its rapid adoption, it offers a greenfield opportunity to create new MRAM-based architectures that fully utilize all the features and benefits that MRAM has to offer. Before I close, I would like to discuss our long-term strategy, which entails reaching $100 million in annual revenue over the next three to five years. We believe this growth will be driven by the ramp of new products, most notably our new X5 parts in our persist product portfolio, such as the 64 megabit part I described earlier, and continued solid growth in our toggle MRAM and licensing business. Our new Persyst XPY parts are getting solid traction. They're offered in densities from 4 megabit to 256 megabit and include the power optimized SC families and the high reliability or HR families with quad and octal SPY interfaces. For example, in industrial automation, energy management, electric vehicle, and casino gaming markets, reliable high density memory is required for next generation systems. In aerospace and defense markets, such as LEO satellites, flight control systems require reliable, fast, and read and write speeds, and fast boot for configuration. And in the FPGA and the MPU markets for AGI, low standby power, instant on, and high density memory is needed for larger bit streams. We expect our first enhanced serial norm, like Unisys product family, to be in production in 2027 and anticipate these products to contribute to our 100 million revenue target. Before I turn the call over to Bill to walk through our financials and guidance, I would like to briefly touch on the industry environment. As has been widely publicized, the industry is expecting experiencing memory shortages. Memory suppliers, who have for decades been pushed into commoditization, have seen a shift based on unprecedented memory shortages driven by the demands of AI. As a result, they have gone into allocation mode and are moving their capacity up the food chain. Companies that can make Norflash, NAND, and DRAM are shifting those capacities to where they can get more margin out of their fixed capacity. NOR suppliers, for example, are converting their lines to support DRAM to maximize their margins and generate more revenue. This has created a gap in the supply for NOR flash and driving customers to look for alternatives. We are in conversations with customers to evaluate our X5 STDM RAM to replace NOR flash. We have the capacity to support such demand, and our parts are compatible with NOR flash. While these market dynamics are speeding up such conversations, revenue is contingent upon the qualification cycles of our potential customers. I will now turn it over to our CFO, Bill Cooper, who will walk you through our fourth quarter financials and first quarter 2026 guidance. Bill?