FormFactor, Inc.

The company's VP of Investor Relations will remind you of some important information. Thank you. Today, the company will be discussing GAAP P&L results and some important non-GAAP results intended to supplement your understanding of the company's financials. Reconciliations of GAAP to non-GAAP measures and other financial information are available in the press release issued today by the company and on the Investor Relations section of our website. Today's discussion contains forward-looking statements within the meaning of the federal securities laws. Examples of such forward-looking statements include those with respect to the projections of financial and business performance, future macroeconomic and geopolitical conditions, the benefits of acquisitions and investments, including acquisition of manufacturing facility, anticipated industry trends, potential disruptions in our supply chain, the impacts of regulatory changes, including tariffs and changes in export controls, the anticipated volatility in demand for products, our ability to develop, produce, and sell products, and the assumptions upon which such statements are based. These statements are subject to known and unknown risks and uncertainties that could cause actual results to differ materially from those expressed during this call. Information on risk factors and uncertainties is contained in our most recent filing on Form 10-K with the SEC for the physical year ended December 28, 2024, and in our other SEC filings, which are available on the SEC's website at www.sec.gov and in our press release issued today. Forward-looking statements are made as of today, October 29, 2025, and we assume no obligation to update them. With that, we will now turn the call over to FormFactor CEO, Mike Schleser.

Mike Schleser, you're on mute. Sorry about that.

Thanks for joining us today. FormFactor's third quarter revenue, gross margin, and earnings per share exceeded both second quarter results and the midpoint of our outlook range. Our outlook for the current fourth quarter builds on the third quarter, and we expect to again deliver sequentially higher revenue, earnings, and most importantly, gross margin. As you heard from us on last quarter's call and in meetings with many of you since then, we're focused on and committed to improving our profitability to get back on a path to the 47% non-GAAP gross margins of our target model. As you can see in our fourth quarter outlook, we expect to reach the model quarterly revenue run rate earlier than we achieve model gross margins. This disconnect is driving urgency across form factor in executing a program of rapid and immediate gross margin improvement actions that have already produced the 250 basis point increase from the second quarter, and we anticipate will produce an additional 100 basis point increase in the fourth quarter. We expect these short-term improvements will continue throughout next year, steadily closing the gap to the target model gross margin of 47%. At the same time, we're also executing longer-term structural initiatives that will further improve our gross margins, including developing and commercializing differentiated new products to drive increased market share and pricing, as well as qualifying and ramping our new Farmers Branch Texas facility to rapidly and cost-effectively expand our capacity in a region with lower operating costs and a variety of financial and regulatory incentives. Eric McInnis, who became our CFO on August 12th, will provide more details on both the short and long-term initiatives. While we're intently focused on improving gross margins to generate the profitability warranted by our leadership positions in both probe cards and engineering systems, we're also working to expand those positions, principally at the intersection of advanced packaging and high-performance compute. Innovations in this space, like the stacking of DRAM chiplets to produce HBMs, which are then integrated with GPUs in multi-radical co-op packages, co-package optics, and even chiplet-based processors deployed at the edge, are all driving increased test intensity and test complexity, creating increased demand in our serve markets. In some of these areas, like HBM and DRAM, and network switches in Foundry and Logic, we today have leading market share positions. In others, like GPUs, we're making steady progress on qualifications to produce market share gains and revenue growth. Turning now to segment and market level details. In DRAM probe cards, we delivered the expected double-digit sequential growth in the third quarter to a new record, primarily from growth in HBM. In the current fourth quarter, we expect to post another record, primarily from an increase in non-HBM applications like DDR5 and LPDDR4, likely driven by the well-publicized recent increases in commodity DRAM in-market demand, pricing, and customer profitability. In HBM, we've now reached the anticipated HBM3 to HBM4 crossover, as HBM3 e-ramps down and HBM4 ramps up. with the overall net result being total fourth quarter HBM revenue similar to the third quarter. We continue to have significant contributions from all three major HBM manufacturers as we execute our long-term strategy to be a key supplier to all the leading customers in the industry, thereby growing and diversifying our HBM demand profile. Consistent with the current market share split between our customers, however, our HBM revenue continues to be skewed towards our largest customer. The ramp-up of HBM4 offers some exciting opportunities for form factor as we look ahead to 2026. First, the test intensity for each HBM stack further increases with the transition to HBM4's 16 high stacks of core die chiplets. from the 8 and 12 high stacks of HBM3 and 3E. As we've detailed in our past discussions of advanced packaging, each of these core dye chiplets must be comprehensively tested to ensure that a single defective core dye does not cause a failure of the entire stack. In addition, the IO speeds of HBM4 increased substantially over HBM3e, and our customers are now striving to exceed the JEDEC specification of 8 gigabits per second. This performance increase and greater test complexity drives competitive advantage for form factor, as our smart matrix architecture is the industry's only production proven high parallelism probe card architecture that can operate at these 10 gigabit plus frequencies. providing our customers with the unique capability to validate their product performance at these higher and more valuable IO speeds. Shifting to the Foundry and Logic probe card market, as expected, third quarter demand in this market was sequentially weaker than the second quarter, and we expect similar Foundry and Logic demand levels in the fourth quarter. Despite broader indications of the beginning of a PC recovery, we're not experiencing significant growth in probe cards for CPU applications. We believe this is because increased demand is being served by our customers' existing legacy node designs, where they're able to employ their existing probe card fleet. As a reminder, probe cards are a device-specific consumable, and as this customer ramps volume on their new designs on new leading-edge silicon nodes, we expect to see increased demand for probe cards in CPU applications. This current situation also highlights the need to execute our strategy to be a key supplier to all the leading customers in the industry. And we continue to build the foundation for market share gains at a large fabulous CPU manufacturer. Having achieved qualification in a specific application with this customer earlier this year, we're now building on that penetration and qualifying our market leading Apollo MEMS probe card technology on a mainstream CPU device that's forecasted to ramp in volume next year. And continuing on the theme of diversification and market share growth in Foundry and Logic, we've now met all technical requirements for a major GPU application with a new variant of the same Apollo MEMS probe card architecture, and are now in the pilot production stage of qualification. Once we complete this final stage of qualification, we'll be in a position to compete for volume orders for GPU probe cards in the first half of 2026. Turning to our system segment, we delivered the expected sequential revenue increase in the third quarter and are forecasting additional growth in the current fourth quarter. Some of this strength stems from the typical seasonal cadence of the systems business, but we're also experiencing increased momentum in the progression towards initial production of co-package optics, or CPO, as well as the significant investments being made to advance quantum computing towards full-scale industrialization. In co-package optics, in addition to the multiple CM300Xi systems running pilot production for our primary CPO customer at their foundry, we've now installed multiple units of our next-generation Triton silicon photonics test system. Developed in collaboration with Advantest and Tokyo Electron, Triton brings together fab-level automation and integration of both optical and electrical probe and test capability for our customers. Triton represents the next step in our silicon photonics product roadmap as we transition our differentiated electro-optical probing technology from the lab to the fab. helping enable the adoption of energy-efficient optical data transmission in tomorrow's data centers. Before I turn the call over to Eric, I want to reiterate our continued commitment to achieving the 47% gross margin of our target model. As you can see from our fourth quarter guidance, we expect to reach target model revenue levels before we reach target model gross margin levels, but we've shown meaningful progress towards closing this gap. We plan to continue gross margin improvement in our manufacturing footprint by making continued progress this quarter and in 2026, layering on further improvement as we then bring our farmers branch expansion online at a structurally lower cost. These multi-pronged initiatives will improve our competitiveness and add capacity at lower cost, enabling us to grow form factor as we meet the challenges of increased test intensity and higher test complexity associated with the adoption of advanced packaging in applications like high bandwidth memory, co-packaged optics, and quantum computing.