GSI Technology, Inc.

Ladies and gentlemen, thank you for standing by. Welcome to GSI Technologies' third quarter fiscal 2024 financial results conference call. At this time, all participants are in a listen-only mode. Later, we will conduct a question-and-answer session. At that time, we will provide instructions for those interested in entering the queue for the Q&A. Before we begin today's call, the company has requested that I read the following safe hardware statements. The matters discussed in this conference call may include forward-looking statements regarding future events and the future performance of GSI technology that involve risks and uncertainties that could cause actual results to differ materially from those anticipated. These risks and uncertainties are described in the company's Form 10-K filed with the Securities and Exchange Commission. Additionally, I've been asked to advise you that this conference call is being recorded today, January 25th, 2024, at the request of GSI Technology. Hosting the call today is Li-Lin Xu, the company's chairman, president, and chief executive officer. With him are Douglas Shirley, chief financial officer, and Didier Leceur, vice president of sales. I would now like to turn the conference over to Mr. Xu. Please go ahead, sir.

Good afternoon and thank you for joining us. I am pleased to share several key updates from an eventful third quarter. Starting with the product development, we achieved two major milestones that will keep us on track to advance the Gemini APU family. First, in November, we successfully completed the radiation hazard testing on the Gemini 1 APU. for compute-in-space applications. The test results confirm that Gemini 1 has met the characteristics to be a radiation-tolerant processor. We are actively engaged with several satellite companies that need radiation-tolerant APUs, and we are encouraged by their strong interest. Moving to our next generation APU, we completed complete the table of Gemini 2 in the third quarter. In late February, we will evaluate the initial spins and expect to begin sampling Gemini 2 chip in the second half of calendar 2024. Gemini 2 has 8 times of internal memory and 10 times better performance than Gemini 1, at a loadable lower cost. This dramatically improves in cost performance, allow us to target a much broader range of applications. The 96 megabytes of internal memory in Gemini 2 can fit many AI models entirely on the chip, enabling in-place data processing without accessing external memory . This should give Gemini 2 tremendous advantage on compact edge applications like ZONE and ADAS. We anticipate starting initial RFAC deployment with select customers in the second half of calendar 2024. Lastly, in the third quarter, we ship radiation-hardened instruments to two customers for two new programs, and we receive a second SBIR direct-to-Phase II contract in the amount of $1.1 million. Looking ahead, we are in the early stage of developing the architecture for our next generation Gemini 3 chip. We had a discussion with several hyperscalers about APU design options to best address the emerging market's need in the data center. In addition to helping hyperscalers lower data center power consumption, the APU can also provide significant benefit to GM AI end users by reducing inference costs. We initiated preliminary discussion with two major hyperscalers who have expressed interest in our technology and continue to work with internal teams on various early stage concepts. Turning to our financial performance, the third quarter revenue of $5.3 million met our guidance with a gross margin of 56% was at the midpoint of our guidance A sequential improvement in growth margin reflects product mix discourses. Our operating expenses quickly increased year-over-year and sequentially, including a one-time expense of $2.4 million for pre-production masks for Gemini 2. We view this as an investment in future growth as Gemini 2 will greatly expand the APU market search. In parallel, we continue discussion with potential strategic partners to support Gemini to launch and assist with Gemini 3 development. As our most ambitious trip today, we anticipate Gemini 3 will require significant capital investment and partnership to help mitigate our funding needs. We remain focused on further financial management to fill our product roadmap and expansion into new markets. Recently, Cornell University published a research paper spotlighting the unique efficiency of our Gemini 1 APU to accelerate location filtering in DNA mapping. Delia will discuss the detail of the paper and its implications for GSI in his comments. In closing, it was an eventful Third quarter with tremendous progress on our Gemini roadmap. Prudent expense management and action to increase our financial flexibility to support our growth. We remain laser focused on bringing our innovative APUs to market and driving long-term value creation. Now I'll hand the call over to Didier, who will discuss our business performance further. Please go ahead, Didier.

Thank you, Lillian. I want to provide some additional context on why we are so confident in the market potential for our APU architecture, especially for inference workloads. First, the unmatched flexibility of our variable bit processing is key. With two million undefined bit processors that can be toggled from one bit to two million bits cycle by cycle, our APU can adapt in real time to maximize efficiency. This dynamic bit-wise configurability can process long strips one bit at a time and is ideal for inference since research shows that different bit precisions are more efficient for different models. Second, our APU architecture breaks the Von Neumann model by removing the data fetch function. This innovative design delivers higher performance with lower power consumption. As Leline mentioned, these capabilities directly address the critical needs of data centers and emerging applications by lowering data center power consumption and reducing inference costs for Gen AI end users. Importantly, I want to emphasize that our APU represents true compute and memory architecture. Unlike competing chips that claim compute and memory, they are actually near memory compute, and our APU has logic physically integrated in the memory. This fundamental difference in architecture will ultimately enable our APU to achieve the transformative speed and efficiency gains we anticipate as we scale. Our true compute and memory architecture gives us a sustained competitive advantage. To accelerate ecosystem development, we are focusing on getting APU in the hands of key partners in the military, hyperscalers, and academia. Their real-world deployment and libraries will showcase the benefits expand use cases, and support our go-to-market capabilities. One example of the strategy that's helping us promote and monetize GeminiOne is a recently published research paper from Cornell University. We are pleased to announce that the Cornell paper demonstrates our GeminiOne APU's unique performance benefits for genomic applications. Leveraging the APU's massively parallel in-memory architecture, Cornell researchers showed up to six times faster DNA sequencing filtering compared to a 16-core CPU. This showcases our technology's advantage for data-intensive workloads requiring rapid, low-precision comparisons. The study also reveals strong potential to accelerate other applications with similar data matching needs, including medical data analysis, search, security, and more. With simple scaling, our APU can be packed into cost-effective, high-density servers to multiply this performance for real-world deployments that can lower power budgets for hyperscalers compared to GPU solutions. These results reinforce our significant market opportunities across sectors that rely on efficiently finding patterns and similarities within massive data sets. We remain focused on delivering the game-changing in-memory compute performance to customers across multiple industries. As Leline mentioned, we anticipate receiving first silicon devices of Gemini 2 in February. After initial evaluation and debugging, We will target a second SPIN this summer and initiate benchmarking shortly after. Our $2.3 million in SBIR funding will support this development. As a reminder, this includes our recently announced second SBIR Directive Phase 2 1.1 million contract to create specialized algorithms for the U.S. Air Force Research Laboratory. The target applications include in-craft applications such as search and rescue, object detection, moving target indication, change detection, and SSIM in GPS absent situations. GSA will also develop algorithms using data from the U.S. Space Force to showcase the performance benefits of its compute and memory APU-2 integrated circuit. In summary, The versatility of architecture, hands-on customer engagements, and ecosystem partnerships gives us confidence in our market opportunity. We have a robust product roadmap to deliver continuous innovations that we believe will capitalize APU adoption across multiple industries in the coming years. Let me switch now to customer and product breakdown for the third quarter. In the third quarter of fiscal 2024, sales to Nokia were $807,000, or 15.2% of net revenues compared to 1.3 million or 20% of net revenues in the same period a year ago, and 1.2 million or 20.3% of revenues in the prior quarter. Military defense sales were 28.2% of third quarter shipments compared to 26.2 of shipments in the comparable period a year ago, and 34.8% of shipments in the prior quarter. Sigma Quad sales were 46.9% of third quarter shipments compared to 45.2% in the third quarter of fiscal 2023 and 55.8% in the prior quarter. On one last note, on product sales in the third quarter, we shipped over $600,000 of a prototype radiation-hardened SRAM to two different customers. These will be deployed in two separate satellite programs. I'd like to hand the call over to Doug. Doug, go ahead, please.