QuickLogic Corporation

Ladies and gentlemen, good afternoon. At this time, I would like to welcome everyone to QuickLogic Corporation's fourth quarter fiscal 2024 earnings results conference call. As a reminder, today's call is being recorded for replay purposes. I would now like to turn the conference over to Ms. Allison Ziegler of Darrell Associates. Ms. Ziegler, please go ahead.

Thank you, Operator, and thanks to all of you for joining us. Our speakers today are Brian Faith, President and Chief Executive Officer, and Elias Nader, Senior Vice President and Chief Financial Officer. As a reminder, some of the comments ClickLogic makes today are forward-looking statements that involve risks and uncertainties, including but not limited to stated expectations relating to revenue from new and mature products, including the expected timing of such revenue, statements regarding our future profitability and cash flows, statements regarding the timing, milestones, and payments related to QuickLogic's government contracts, statements pertaining to QuickLogic's future performance, design activity and its ability to convert new design opportunities into production shipments, timing and market acceptance of its customers' products, schedule changes and production start dates that could impact the timing of shipments, the company's future evaluation systems, broadening the number of our ecosystem partners and expected results and financial expectations for revenue, gross margin, operating expenses, profitability, and cash. Actual results or trends may differ materially from those discussed today, including as a result of the company's audit, which is still underway. For more detailed discussions of the risks, uncertainties, and assumptions that could result in those differences, please refer to the risk factors discussed in QuickLogic's most recently filed periodic reports with the SEC. Ziklogic assumes no obligation to update any forward-looking statements or information which speak as of the respective dates of any new information or future events. In today's call, we will be reporting non-GAAP financial measures. You may refer to the earnings release we issued today for a detailed reconciliation of our GAAP to non-GAAP results and other financial statements. We have also posted an updated financial table on our IR webpage that provides current and historical non-GAAP data. Please note, QuickLogic uses its website, the company blog, corporate Twitter account, Facebook page, and LinkedIn page as channels of distribution of information about its business. Such information may be deemed material information, and QuickLogic may use these channels to comply with its disclosure obligations under Reg FD. A copy of the prepared marks made on today's call will be posted on QuickLogic's IR webpage shortly after the conclusion of today's earnings call. I'd now like to turn the call over to Brian. Go ahead, Brian.

Thank you, Alison. Good afternoon, everyone, and thank you all for joining our fourth quarter 2024 conference call. Due to external delays that pushed out certain contract awards, we reported Q4 2024 revenue slightly below the midpoint of our guidance, and we will forecast lower Q1 2025 revenue than we previously anticipated. The good news is the contract logjam that had delayed some key awards by a little over a quarter has now loosened. With two new EFPGA hard IP contracts now in the books and several more expected in the very near term, we anticipate a significant rebound in revenue and profitability beginning in Q2 and solid revenue growth, non-gap profitability, and positive cash flow for full year 2025. Last week, we finalized a $1.1 million EFPGA hard IP contract with a new defense industrial base, or DIB, customer that will use the 12LP fabrication process at GlobalFoundries, or GF. Due to the fact we already have EFPGA hard IP established for that process, cash flow will begin in Q1 2025, and revenue recognition will be in Q2 2025. Last week, we were also awarded the first phase of what we expect will be a seven-figure direct-to-storefront eFPGA hard IP contract with another new Dib customer. This application, which enables low-power processing of changing algorithms, is perfectly suited for our eFPGA solution. We expect to be awarded the balance of this contract in the second half of 2025. We anticipate design services and IP revenue recognition could begin in Q3 and carry into 2026. Following that, we expect storefront revenue could begin as early as 2027. While some of our existing contracts have good storefront potential that may materialize earlier, this is the first of what we believe will be several direct-to-storefront contracts during the next couple of years. Earlier this month, we won an eFPGA hard IP design with another new customer. In addition to using a fabrication process for which we have already established our eFPGA hard IP, this design will also use an off-the-shelf hard IP core for a data converter in a wireless application that we previously developed using our proprietary Astralis IP generation tool. The ability to benefit from the work we've completed is a big deal. Having developed IP for fabrication processes and hard IP core designs lowers customer risks, shortens our development and revenue recognition cycles, and provides us with favorable financial leverage in the form of improved margins. We anticipate these benefits will start to become meaningful this year. In addition to these recent wins, We announced the award of the fourth tranche of the strategic radiation hardened FPGA government contract valued at approximately $6.6 million on December 23rd. This brings the total of our awards through four tranches to roughly $34 million. The total potential for this contract, including future options, is currently $72 million. We are seeking permission to share more details on the expanded scope of the program and test chip timeline. Turning to Intel 18A, we expect to be awarded the first of two eFPGA hard IP contracts within weeks, and the second one very shortly thereafter. The combined value of these contracts is anticipated to be mid seven figures. If the contracts are both awarded in the timeframes outlined by our customer, we expect to recognize all of the revenue in Q2 2025. Due to the NDAs and the formal process for press release approval, there may be delays in the announcements of these contracts. Please keep in mind as it stands today, QuickLogic is the only company that has EFPGA hard IP that is optimized for Intel 18A. We believe the significant investments we made during 2024 ahead of contract awards to realize this unique position will provide us with solid returns on that investment going forward. Turning to the competitive landscape, last November, Analog Devices announced the acquisition of our most capable competitor, FlexLogix. This is a clear testament that large semiconductor companies are embracing the value of incorporating EFPGA into their standard products. Following this acquisition, we announced the appointment of FlexLogic's former VP of Sales, Andy Jaros, as the new QuickLogic VP of IP Sales. Since FlexLogic's eFPGA IP will no longer be available for licensing, there is a notable void in the market that we can fill. This is particularly true for customers that now need to secure a new long-term partner. Andy is working closely with the former FlexLogic's customers that have multi-year EFPGA roadmaps to introduce the benefits of moving to QuickLogic. Now let me take a moment to update our progress on existing contracts that are scheduled to contribute to our 2025 EFPGA hard IP revenue. A number of these contracts have achieved significant milestones during the last several months. These include tape out, and in several cases, test chips that have been completed and are in validation. This is important because in some cases, test chip validation will lead to an IP production license, and in a few cases, new designs for our eFPGA hard IP. These are also good illustrations that a long tail of revenue is commonly attached to our eFPGA hard IP contracts, and following that, a stream of royalties or storefront revenue that can extend for years and, in some cases, more than a decade. During the first quarter of 2024, we announced two contracts that target 12-nanometer processes. The first contract is with a defense industrial-based customer and includes two cores that will be fabricated on the GF12LP process. We completed our initial deliverables for the first core during Q3 and the second core during Q4. With our IP deliverables complete, we anticipate nominal revenue recognition during Q1 and Q2 2025 in support of customer test ship development. We will leverage the eFPGA HART IP we developed for this contract to accelerate revenue recognition for the new 12OP contract I mentioned earlier. The second contract is with a large, well-known international company. This design is for a new ultra-low power SOC based on TSMC's 12 nanometer process that is targeting a variety of commercial and industrial IoT AI applications. We completed our deliverables on this contract and recognized the associated revenue during Q3. Their test chip has been manufactured and is currently being evaluated by the customer. We expect the evaluation to be completed in early Q2 at which point the customer will make a decision regarding a second design. In November 2022, I shared that we taped out a new device for a customer that incorporates our eFPGA hard IP. While we are in a holding pattern due to a delay with one of the customer's subcontractors, we continue to believe we will resume work during the second half of 2025 and that this design has very substantial storefront potential starting in a couple of years. Since our last conference call, we have engaged with this customer on multiple new ASIC and chiplet design opportunities that incorporate our eFPGA hard IP. These designs target other foundries and fabrication nodes for which we have already developed eFPGA hard IP. This means we will be able to recognize revenue fairly quickly if we are successful in winning these engagements. In September 2023, we announced the leading technology company chose our EFPGA hard IP for a design that will be fabricated using GF's 22FDX platform. The customer has completed its design and tape out, and test ships are currently in fabrication. If all goes as planned, we anticipate revenue recognition of a production license during the second half of 2025. In November 2023, we announced a global semiconductor leader chose our EFPGA hard IP for design that will be fabricated on UMC's 22 nanometer process. The customer now has a test chip back from fabrication and their evaluations are going very well. We anticipate continued involvement in their marketing efforts during the first half of 2025. and expect the design will generate production IP revenues for QuickLogic this year and royalty revenue beyond. A quick update on chiplets. We attended the annual chiplet summit in January with YourChip. There was a definite uptick in interest this year. I think YourChip's CEO, Cash Johal, is right in his forecast that 2026 will be the year of the chiplets. which should coincide well with your chip's introduction schedules for merchant chiplet solutions. This also dovetails well with the elevated interest we are seeing in AI inferencing at the edge. As a matter of fact, one of our existing eFPGA hard IP customers that I previously mentioned is already leveraging our technology for an edge AI inferencing application. While the market for merchant chiplet solutions develops, We are continuing to work with various companies that are targeting internal ASIC chiplet solutions using our EFPGA hard IP. We already have existing contracts that may evolve to include ASIC chiplet solutions. In line with our forecasts, we released Aurora 2.9 in Q4. Aurora 2.9 includes some very significant enhancements that you can read about on our website. Following this, we released Aurora Pro 2.9, which integrates Synopsys' Simplify FPGA synthesis software. The integration of Simplify was driven by large strategic customers who worked closely with us during beta testing. This integration has already helped us win one of the new contracts I mentioned earlier, and we believe many more will follow. We are on pace to include further updates for Aurora with the release of version 3.0 later this quarter. The new distributors that we've discussed in some detail during our last two conference calls are executing very well. In total, they have more than doubled the value of QuickLogic design opportunities they are addressing. While the bulk of this value is for new eFPGA hard IP designs, they are also advancing the new EOS S3 and discrete FPGA opportunities I mentioned last quarter. In line with the forecast I shared last quarter, shipments of EOS S3 increased sequentially in Q4 2024, and we are forecasting a modest sequential increase in Q1 2025. While our primary smartphone customer is scheduled to continue using EOS S3 in new designs that extend to 2026, the demand for older designs will likely decrease in 2025. Turning now to Sensible. Last month, we announced that our Board of Directors is actively exploring options for Sensible, and there were preliminary discussions regarding the possible sale of the company or its assets. Due diligence is ongoing, so I cannot comment other than we expect a conclusion before our next earnings call and that our full-year outlook for solid growth and profitability does not include any contributions from Sensible. With that, let me now turn the call over to Elias for a review of the financial results, and I will rejoin for our closing remarks. Elias, please go ahead.