Synopsys, Inc.

Ladies and gentlemen, welcome to the Synopsis Earnings Conference Call for the first quarter of fiscal year 2024. At this time, all participants are in listen-only mode. I would like to remind everyone, in order to ask the question, press star, then the number one on your telephone keypad. If you should require assistance during the call, please press star followed by zero. Today's call will last one hour. As a reminder, today's call is being recorded. At this time, I would like to turn the conference over to Trey Campbell, Senior Vice President of Investor Relations. Please go ahead.

Thank you, Operator. Good afternoon, everyone. With us today are Sassine Ghazi, President and CEO, and Sheila Glazer, CFO. Before we begin, I'd like to remind everyone that during the course of this conference call, Synopsys will discuss forecasts, targets, and other forward-looking statements, including statements regarding our pending acquisition of ANSYS. However, we will not be commenting on ANSYS's financial results. While these forward-looking statements represent our best current judgment about future results and performance as of today, our actual results are subject to many risks and uncertainties that could cause actual results to differ materially from what we expect. In addition to any risks that we highlight during this call, important factors that may affect such statements are described in our most recent SEC reports and today's earnings press release. In addition, we will refer to certain non-GAAP financial measures during the discussion. Reconciliations to their most directly comparable GAAP financial measures and supplemental financial information can be found in the earnings press release, financial supplement, and 8K that we released earlier today. All of these items, plus the most recent investor presentation, are available on our website at www.synopsys.com. In addition, the prepared remarks will be posted on our website at the conclusion of the call. With that, I'll turn the call over to Sassine.

Good afternoon. In Q1, we continued our strong momentum with revenue in the upper end of our guidance range and non-gap EPS surpassing the upper end of our guidance range. Revenue was $1.65 billion, up 21% year over year. Non-GAAP operating margin was 38.7%, up approximately 3.5 points year over year. Non-GAAP EPS was $3.56, up 36% year over year. While maintaining our laser focus on meeting our quarterly financial commitments, We strategically drive the business for long-term financial success. Over the last three years, we have delivered a 17% revenue CAGR, non-GAAP operating margin improvement of seven points, and non-GAAP EPS growth at a 26% CAGR. Sheila will discuss the financials and guidance in more detail. Let's turn to market trends. We've entered an era of pervasive intelligence, driven by the rise of artificial intelligence, silicon proliferation, and software-defined systems. These trends demand more compute, new architectures, and new design methodologies, while requiring us to address the significant challenges of complexity, cost, energy consumption, and security. Despite the mounting challenges, design starts continue to rise as the semiconductor industry scales to a trillion dollars in revenue or more by the end of the decade. As the leading silicon-to-systems design solution company, with best-in-class EDA tools and the broadest portfolio of semiconductor IP, Synopsys' growth opportunity is truly incredible and already underway. Across industries, a paradigm shift is underway as companies race to deliver on this era of pervasive intelligence, where AI and smart technologies are omnipresent and interconnected. To capitalize on this shift, the technology industry's overcoming is converging on a silicon-to-systems approach to innovation. As the company at the heart of silicon and systems, Synopsys was made for this moment. There is no one more capable of helping companies innovate for this era of pervasive intelligence. Semiconductor companies are now designing with a system approach in mind, while system companies are unlocking additional values through purpose-built chips and software-defined systems. At the same time, Customers see the fusion of electronics design and physics simulation as critical to delivering high-performing and high-yielding solutions for their business. Building on our seven-year partnership with Ansys, the industry leader in simulation, and a deliberate multi-year strategy to reshape our business to support system-level design, last month we announced our intent to acquire Ansys. This transaction will grow our TAM by 1.5X to $28 billion and further enhance our silicon-to-system strategy, both across our core EDA segment and in highly attractive adjacent growth areas where Ansys has an established presence and successful go-to-market expertise. Customer feedback on the proposed transaction has been incredibly supportive. and we look forward to closing this transaction in the first half of 2025. Now I'll share some segment highlights, starting with design automation, where we saw strong design win activity across the business. We continue to enhance our leadership in digital EDA as our capabilities become increasingly critical for the leading chips at advanced nodes. We are proud to have partnered with our customers to achieve a number of industry firsts in Q1. The world's first GAA-based next-generation ARM Cortex-X mobile core tape-out at a leading Asian mobile SOC provider. The first completed tape-out for a server SOC on 18A. And Asia's first N5 ARM flagship automotive core tape-out for a leading EV OEM. In addition, we had multiple competitive wins anchored by two nanometer and three nanometer projects at the leading Asian mobile semiconductor company. We are also gaining momentum with analog mixed signal customers. We won several competitive full-flow displacements at analog mixed signal companies, including networking OEMs in Europe and Japan. A key differentiator in these competitive wins was the breadth and leadership of our EDA platform, from digital to analog and from architecture to sign-off. All turbocharged with the industry's leading full-flow AI platform, Synopsys.ai. Synopsys.ai focuses on three distinct pillars of value for our customers. Optimization, XSO.ai, data analytics, X.DA, and generative AI, including our co-pilot. Starting with our XSO.AI family, which includes design, verification, test, and analog space optimization, we continue to expand our footprint and drive sell-up in our core EDA tools. DSO.AI was key in several major wins and continues to drive a 20% plus uplift to Fusion compiler revenue at multiple accounts. Increasing share of usage of VSO.AI versus the competition was driven by superior PPA results on our platform versus alternatives. We saw very strong pull for VSO.AI with multiple production deployments that are seeing excellent improvements in test coverage and turnaround time. A large North American HPC semiconductor company made a significant investment in VSO.AI technology with plans to immediately deploy on four projects and eventually deploy corporate wide. Another large North American GPU company saw 2x faster turnaround time and a 20% improvement in coverage, and is planning a large-scale deployment of the technology. Our analog AI tool, ASO.AI, now has multiple deployments moving to production with reference flows at TSMC, Samsung, and Intel for analog migration. We also broadened the capability of TSO.AI adding a design for test feature to the proven ability for advanced pattern generation. At the international test conference this quarter, we demonstrated a 20% reduction in total pattern count using TSO.AI. Our data analytics AI products also saw significant logo engagement growth. A great example is silicon.da, production analytics. which is part of the silicon lifecycle management family and spans design through product manufacturing phases. Silicon.da automatically highlights silicon data outliers, enabling engineering teams to quickly identify and correct underlying issues in design and manufacturing and boost productivity. Last quarter, we had a groundbreaking generative AI announcement with Microsoft for accelerating chip design, Synopsys.ai co-pilot. The integration of GenAI across Synopsys.ai provides chip designers with collaborative capabilities that offer expert tool guidance, generative capabilities to enable RTL and collateral creation from natural language. Following positive feedback from initial pilot participants, AMD, Intel, and Microsoft, we'll be adding a number of other companies with our beta rollout. In Q1, we also won significant multi-die package designs. Our 3DIC compiler platform gained substantial momentum in multi-die packaging. Multi-die implementations continue to increase in the HPC market with an expectation that by 2028, 40% of HPC designs will be multi-die architectures. Like the transition to AI, this new design paradigm will create significant opportunity for both our EBA and IP businesses. Moving to our systems business, hardware-assisted verification had a strong quarter with excellent bookings on Zbook, and HAPS across multiple geos with eight new hardware logos. We saw share expansion at a large Asian OEM on Zebu 5 and grew our HAPS footprint at two top North American customers. In system software, Booking's momentum continued with key automotive OEMs and Tier 1s. One example was the collaboration we announced with Continental. Integrating our industry-leading virtual prototyping solutions within Continental's automotive edge development framework, we're building the digital twin capabilities that allow automakers to accelerate their software development and improve their time to market. Now, moving to design IP. which continues to deliver industry-leading growth as the IP supplier of choice for leading HPC, AI, automotive, and mobile chips at advanced nodes. This quarter, we close the multi-year, multi-node, and multi-foundry agreement to enable the next generation automotive and IoT platforms in a landmark design win at the major North American semiconductor company. A keystone IP in HPC and AI is PCIe 6.0, where we lead the industry with more than 50 lifetime wins. We demonstrated our next wave of innovation by showcasing our PCIe 7.0 technology at DesignCon 2024. Multi-die packaging is a significant tailwind to IP as well as EDA. We won four die-to-die IP engagements in the quarter, surpassing 45 lifetime, enhancing our leadership in this emerging space. We proudly demonstrated the industry's first silicon success for UCIeS PHY IP in TSMC N3e and N5. The tight integration with our flagship EDA tool, 3DIC compiler, is generating significant productivity gains with improved design margins. Finally, at the beginning of the quarter, we launched our new Arc5 RISC-V based portfolio with strong customer interest. The Arc5 processors are highly configurable and extensible to deliver optimal power performance efficiency for a broad range of applications such as automotive, storage, and IOT. Now to the software integrity segment, which delivered record revenue despite the challenging macroeconomic backdrop for enterprise software. We continue to evaluate strategic alternatives for this business, and we will provide an update when we complete this process. While the company engages in this process, the Software Integrity Group will continue to focus on investing and innovating in our market-leading products and serving customers with our leading application security testing portfolio and a global go-to-market execution. In summary, we had an excellent start to the year, building on momentum underpinned by multiple secular growth drivers. We have a resilient business model and our customers continue to prioritize investments in the silicon and systems that position them for future growth. We are aligning our portfolio investment with the greatest return potential to accelerate our growth. Thank you to our employees, partners, and customers for their passion and commitment. Finally, We look forward to providing you more insight into our business strategy and growth opportunities at our upcoming Investor Day, which will be held in conjunction with our Synopsys Users Group event in Santa Clara on March 20th. I hope to see many of you there. With that, I'll turn it over to Sheila.